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14922 Demonstrate knowledge of the principles of electronic logic for computing – NQF Level 04
Target audiences
- All Ages Qualify
- Everyone Qualifies for our Courses
- All countries qualifies for our Courses
Requirements
- National Identity Document, Passport, Work Permit or Asylum
- Have physical Address where you will receive a certificate
- Have a functioning cell phone number and the email address
Curriculum
- 7 Sections
- 80 Lessons
- 56 Weeks
Expand all sectionsCollapse all sections
- Student Personal Details1
- Student Guide1
- Text Book +Notes +Lesson60
- 3.114922-3-1 Neftaly Lesson HOW TO USE THIS GUIDE
- 3.214922-3-2 Neftaly Lesson PROGRAMME OVERVIEW
- 3.314922-3-3 Neftaly Lesson HOW YOU WILL LEARN
- 3.414922-3-4 Neftaly Lesson HOW YOU WILL BE ASSESSED
- 3.514922-3-5 Neftaly Lesson SESSION 1: PERFORM BOOLEAN LOGIC ALGEBRA OPERATIONS.
- 3.614922-3-6 Neftaly Lesson INTRODUCTION
- 3.714922-3-7 Neftaly Lesson THE PERFORMANCE DEMONSTRATES ALGEBRAIC LAWS BY USING BOOLEAN ALGEBRA.
- 3.814922-3-8 Neftaly Lesson Boolean Algebra Functions
- 3.914922-3-9 Neftaly Lesson TRANSLATING BOOLEAN EXPRESSIONS TO LOGIC DIAGRAMS AND VICE VERSA.
- 3.1014922-3-10 Neftaly Lesson Logic Diagram
- 3.1114922-3-11 Neftaly Lesson Boolean Expression
- 3.1214922-3-12 Neftaly Lesson Converting from a Logic Circuit Diagram to a Truth Table
- 3.1314922-3-13 Neftaly Lesson Converting Logic Circuit Diagrams to Boolean Expressions
- 3.1414922-3-14 Neftaly Lesson Converting Boolean Expressions to Logic Diagrams
- 3.1514922-3-15 Neftaly Lesson Converting a Truth Table to a Logic Diagram
- 3.1614922-3-16 Neftaly Lesson THE PERFORMANCE TRANSLATES TRUTH TABLES USING BOOLEAN EXPRESSIONS.
- 3.1714922-3-17 Neftaly Lesson Converting Truth Tables to Boolean Expressions
- 3.1814922-3-18 Neftaly Lesson BOOLEAN EXPRESSIONS BY USING DECISION TABLES AND LOGIC DIAGRAMS
- 3.1914922-3-19 Neftaly Lesson 2-input AND Gate
- 3.2014922-3-20 Neftaly Lesson 2-input OR (Inclusive OR) Gate
- 3.2114922-3-21 Neftaly Lesson 2-input NAND (Not AND) Gate
- 3.2214922-3-22 Neftaly Lesson 2-input EX-NOR (Exclusive NOR) Gate
- 3.2314922-3-23 Neftaly Lesson OUTPUT OF A TRUTH TABLE AND LOGIC DIAGRAM FOR A GIVEN SERIES OF INPUTS.
- 3.2414922-3-24 Neftaly Lesson SESSION 2: DEMONSTRATE KNOWLEDGE OF LOGIC GATES.
- 3.2514922-3-25 Neftaly Lesson INTRODUCTION
- 3.2614922-3-26 Neftaly Lesson SYMBOL, TRUTH TABLE, LOGIC DIAGRAM AND BOOLEAN EXPRESSION FOR LOGIC GATES.
- 3.2714922-3-27 Neftaly Lesson LOGIC GATES TO PERFORM THE FUNCTIONS OF THE XOR GATE.
- 3.2814922-3-28 Neftaly Lesson The Digital Logic “Exclusive-OR” Gate
- 3.2914922-3-29 Neftaly Lesson Ex-OR Gate Equivalent Circuit
- 3.3014922-3-30 Neftaly Lesson INTEGRATED CIRCUITS THAT IMPLEMENT GATES FOR THE COMPUTER SYSTEMS.
- 3.3114922-3-31 Neftaly Lesson MEMORY CHIPS USE, FUNCTIONS AND OPERATIONAL CHARACTERISTICS.
- 3.3214922-3-32 Neftaly Lesson Classification of Integrated Circuits
- 3.3314922-3-33 Neftaly Lesson SESSION 3: CONVERT NUMBERS USING DECODERS AND ENCODERS.
- 3.3414922-3-34 Neftaly Lesson INTRODUCTION
- 3.3514922-3-35 Neftaly Lesson THE CONVERSION CONVERTS NUMBERS BETWEEN COMBINATIONS OF DECIMAL, BINARY AND HEXADECIMAL, USING ENCODERS.
- 3.3614922-3-36 Neftaly Lesson Digital Encoder using Logic Gates
- 3.3714922-3-37 Neftaly Lesson CONVERTING NUMBERS BETWEEN DECIMAL, BINARY ,HEXADECIMAL, USING DECODERS.
- 3.3814922-3-38 Neftaly Lesson A 4-to-16 Binary Decoder Configuration.
- 3.3914922-3-39 Neftaly Lesson 2-to-4 Line NAND Binary Decoder
- 3.4014922-3-40 Neftaly Lesson Memory Address Decoder.
- 3.4114922-3-41 Neftaly Lesson Memory Address Decoding.
- 3.4214922-3-42 Neftaly Lesson SESSION 4: DEMONSTRATE KNOWLEDGE OF THE GENERAL PRINCIPLES OF LOGIC DEVICES.
- 3.4314922-3-43 Neftaly Lesson INTRODUCTION
- 3.4414922-3-44 Neftaly Lesson DRAWING SYMBOLS FOR LOGIC DEVICES ACCORDING TO INDUSTRY CONVENTIONS.
- 3.4514922-3-45 Neftaly Lesson Truth Tables
- 3.4614922-3-46 Neftaly Lesson Reading Logic Diagrams
- 3.4714922-3-47 Neftaly Lesson OPERATIONS BY DESCRIBING DIFFERENT LOGIC DEVICES.
- 3.4814922-3-48 Neftaly Lesson Types of Programmable Logic Devices There are several different kinds of programmable logic devices at Future Electronics. We stock many of the most common types categorized by several parameters including Programmable Type, Number of I/O Lines, Supply Voltage, Memory Density, System Gates, Packaging Type and many other parameters specific to the type of programmable logic device. Our parametric filters will allow you to refine your search results according to the required specifications.
- 3.4914922-3-49 Neftaly Lesson Applications forProgrammable Logic Devices:
- 3.5014922-3-50 Neftaly Lesson Choosing the Right Programmable Logic Device:
- 3.5114922-3-51 Neftaly Lesson Programmable Read Only Memory (PROM)
- 3.5214922-3-52 Neftaly Lesson Programmable Array Logic (PAL)
- 3.5314922-3-53 Neftaly Lesson What Device Do I Use?
- 3.5414922-3-54 Neftaly Lesson VHDL, Verilog, or Schematics
- 3.5514922-3-55 Neftaly Lesson SESSION 5: DEMONSTRATE KNOWLEDGE OF INTEGRATED CIRCUIT SPECIFICATIONS.
- 3.5614922-3-56 Neftaly Lesson INTRODUCTION
- 3.5714922-3-57 Neftaly Lesson THE DEMONSTRATION IDENTIFIES THE INSTRUCTION SETS FOR THE INTEGRATED CIRCUIT.
- 3.5814922-3-58 Neftaly Lesson Microarchitecture and system-level design
- 3.5914922-3-59 Neftaly Lesson RTL design
- 3.6014922-3-60 Neftaly Lesson METHOD THAT A (CPU) USES FOR ADDRESSING INSTRUCTIONS AND METHOD FOR ADDRESSING DATA.
- Home Activity and Tasks1
- Portfolio of Evidence Guide18
- 5.114922-5-1 CONTACT DETAILS
- 5.214922-5-2 UNDERSTANDING COMPETENCE
- 5.314922-5-3 APPEALS AND DISPUTES
- 5.414922-5-4 ASSESSMENT STRATEGY
- 5.514922-5-5 ASSESSMENT PREPARATION
- 5.614922-5-6 AGREED ASSESSMENT PLAN
- 5.714922-5-7 Assessor’s declaration:
- 5.814922-5-8 LEARNER LETTER OF COMMITMENT
- 5.914922-5-9 DECLARATION OF AUNTHENTICITY
- 5.1014922-5-10 UNDERSTANDING THE PORTFOLIO BUILDING
- 5.1114922-5-11 RECORD OF LEARNING
- 5.1214922-5-12 ASSESSMENT DECISION & EVIDENCE EVALUATION RECORD
- 5.1314922-5-13 ASSESSOR’S FEEDBACK REPORT TO CANDIDATE
- 5.1414922-5-14 MODERATOR REPORT
- 5.1514922-5-15 ASSESSMENT REVIEW
- 5.1614922-5-16 CANDIDATE APPEAL FORM
- 5.1714922-5-17 ASSESSOR’S CONTINGENCY PLAN
- 5.1814922-5-18 UNIT STANDARD
- Formative Assessment -Pre-Assignment15
- Summative Assessment5
Instructor
R400
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